The present invention relates to a so-called flip-chip connection type semiconductor integrated circuit device designed such that a semiconductor integrated circuit device is directly connected to a printed circuit board through bumps, and a method of manufacturing the same.
In order to cope with current tendencies to increase the number of I/O pads of a semiconductor integrated circuit device and decrease its size, a mounting method based on a flip-chip connection method has been used, in which the I/O pads of an integrated circuit chip as a bare chip are directly and electrically connected to the corresponding pads on a printed circuit board. In the flip-chip connection method, first of all, solder projections (bumps) are formed on the respective I/O pads of a bare chip, and the bare chip is then reversed and placed above a printed circuit board such that the solder bumps are positioned with respect to the corresponding pads of the printed circuit board with a high precision. A load is imposed on the chip to temporarily mount it on the printed circuit board. Thereafter, the resultant structure is exposed to an atmosphere with a temperature higher than the melting point of the solder bumps to reflow the solder, thereby directly connecting the solder bumps to the pads. This method allows an increase in the number of I/O pads and a decrease in the pitch of the I/O pads. In addition, since the connection distance between the integrated circuit chip and the printed circuit board decreases, the integrated circuit in a mounted state is capable of a high-speed operation.
When the flip-chip connection method is to be used, since the pitch of the I/O pads of a semiconductor integrated circuit device is small (150 .mu.m or less), pads must be formed on the printed circuit board at the same pitch as that of the pads of the integrated circuit chip with a sufficiently high precision. It is, however, difficult to form pads on a printed circuit board with a high precision. Even if a printed circuit board having pads formed with a high precision can be formed, the cost of the printed circuit board greatly increases. In addition, the small pad pitch also increases the possibility that the bumps between the adjacent pads are short-circuited.
In order to solve this problem, the following method has been proposed. An interconnection is additionally formed on an integrated circuit chip. The initial I/O pads of the integrated circuit chip and the new I/O pads are wired/connected in one-to-one correspondence. With this process, the I/O pads (solder bumps) for flip-chip connection are redistributed at positions different from those of the initial I/O pads of the integrated circuit chip.
FIG. 1 is a sectional view showing a structure near an I/O pad of a conventional flip-chip connection type semiconductor integrated circuit device whose I/O pads have undergone redistribution. A conductive layer 4, an insulating film 5, a solder ball position defining metal layer (BLM) or barrier metal layer 6, a solder bump 7, and the like are stacked on an I/O pad 2 and a passivation film 3 on an integrated circuit chip 1. The I/O pads 2 are wired/connected to the solder bumps 7 through the conductive layers 4 and the barrier metal layers 6 in one-to-one correspondence.
A flip-chip connection type semiconductor integrated circuit device having such an arrangement requires the steps of forming the conductive layer 4, the insulating film 5, the barrier metal layer 6, and the solder bump 7, respectively, resulting in an increase in manufacturing cost. When the solder bump 7 is to be formed by electroplating, the following method is often used. The barrier metal layer 6 is formed on the entire surface of the insulating film 5 to be used as a plating electrode. Thereafter, the barrier metal layer 6 is removed by etching except for a portion under the solder bump 7. In this method, the surface of the solder bump 7 is etched as well as the barrier metal layer 6 to pose a problem in connection. Alternatively, the region of the barrier metal layer 6 which is located under the solder bump 7 is side-etched. As a result, the reliability in connection between the solder bump 7 and the barrier metal layer 6 deteriorates.